EPM5032DC-25
.png "CPLD>EPM5032DC-25")
| ： | EPM5032DC-25 |
|---|---|
| ： | CPLDs |
| ： | Altera |
| ： | 5V 2.54mm P |
| ： | - |
| ： | - |
| ： | 120 |
| ： | YES |
EPM5032DC-25
:
EPM5032DC-25
Manufacturer:
Altera
Package:
-
Encapsulation:
-
Batch number:
Quantity:
120
Pricing(UCD):
| TYPE | DESCRIPTION |
| Surface Mount | NO |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Number of Terminations | 28 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | MACROCELLS INTERCONNECTED BY PIA; 1 LAB; 32 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK |
| HTS Code | 8542.39.00.01 |
| Terminal Position | DUAL |
| Terminal Form | THROUGH-HOLE |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 2.54mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Pin Count | 28 |
| JESD-30 Code | R-GDIP-T28 |
| Number of Outputs | 16 |
| Qualification Status | Not Qualified |
| Operating Temperature (Max) | 70°C |
| Supply Voltage-Max (Vsup) | 5.25V |
| Power Supplies | 5V |
| Temperature Grade | COMMERCIAL |
| Supply Voltage-Min (Vsup) | 4.75V |
| Number of I/O | 16 |
| Clock Frequency | 62.5MHz |
| Propagation Delay | 25 ns |
| Architecture | PAL-TYPE |
| Number of Inputs | 24 |
| Organization | 7 DEDICATED INPUTS, 16 I/O |
| Programmable Logic Type | UV PLD |
| Output Function | MACROCELL |
| Number of Dedicated Inputs | 7 |
| Number of Product Terms | 320 |
| Length | 36.83mm |
| Height Seated (Max) | 5.08mm |
| Width | 7.62mm |
| RoHS Status | Non-RoHS Compliant |
 | |
| 原装正品 | 每颗芯片都来自原厂 |
| |
| 主要产品 | 只生厂材料 |
| |
| 现货库存 | 只生产原材料 |
| |
| 原装库存 | Bom 单 | 价格实惠 |
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