PRELIMINARY
Publication Release Date: April 21, 2005
- 1 - Revision 1.1
WMS7140/1
NONVOLATILE DIGITAL POTENTIOMETERS
WITH UP/DOWN (3-WIRE) INTERFACE,
10KOHM, 50KOHM, 100KOHM RESISTANCE
16 TAPS
WITH OPTIONAL OUTPUT BUFFER
WMS7140/1
- 2 -
1. GENERAL DESCRIPTION
The WMS714x is a 16 non-volatile linear digital potentiometers available in 10KΩ, 50KΩ and 100KΩ
resistance values. The WMS7140/1 can be used as a three-terminal potentiometer or as a two
terminal variable resistor in a wide variety of applications.
The output of each potentiometer is determined by the wiper position, which varies in linearly between
V
A
and V
B
terminal according to the content stored in the volatile Tap Register (TR) which is
programmed through Up/Down (Increment/Decrement) interface. The channel has one non-volatile
memory location (NVMEM0) that can be directly written to by users through the Up/Down interface.
Power-on recall is also built in so the content of the NVMEM0 to Tap Register is automatically loaded.
The WMS7140/1 devices pin out the resistor wiper directly. The WMS7141 devices feature an output
buffer with 3mA minimum drive capability.
All the WMS7140/1 devices are single channel devices offered in 8-pin PDIP, SOIC and MSOP
packages. The WMS7140/1 devices operate over a wide operating voltage ranging from 2.7V to
5.5V.
2. FEATURES
• Drop-in replacements for many popular parts
• Available output buffer for WMS7141 devices
• Single linear-taper channel
• 16 taps
• 10K, 50K and 100K end-to end resistance
• V
SS
to V
DD
terminal voltages
• Non-volatile storage of wiper positions with power-on recall
• Data storage and potentiometer control through Up/Down (3-wire) interface
• Endurance 100,000 write cycles
• Data retention 100 years
• Package options:
o 8-pin PDIP, SOIC or MSOP
• Industrial temperature range: -40° ~ 85°C
• Single supply operation 2.7V to 5.5V
WMS7140/1
Publication Release Date: April 21, 2005
- 3 - Revision 1.1
Up/Down
Serial
Interface
Tap Register
Decode
NVMEM0
NV Memory
NV Memory
Control
CS
V
SS
V
DD
V
A
V
B
V
W
INC
U/D
Up/Down
Serial
Interface
Tap Register
Decode
NVMEM0
NV Memory
NV Memory
Control
CS
V
SS
V
DD
V
A
V
B
V
W
INC
U/D
3. BLOCK DIAGRAM
FIGURE 1 – WMS7140 BLOCK DIAGRAM (Rheostat Mode)
FIGURE 2 – WMS7141 BLOCK DIAGRAM (Divider Mode)
